COMSATS UniversityEducation details

Single-Cycle Processor Design in Verilog

A single-cycle processor designed in Verilog for a computer organization and architecture course.

Inside a single cycle. Schematic illustrating Verilog, datapath and control.
Project schematic · illustrative design

Hardware Design

Architecture

Course: Computer Organization and Architecture.

  • Designed both the data path and control path.
  • Connected instruction memory, datapath components, and control logic into one execution flow.
  • Built the processor to fetch and execute instructions from instruction memory.